Qualifications:
- PhD or Master's degree in Electrical Engineering or a related field
- Over 8 years of experience in designing, developing, and testing high-performance analog and mixed-signal ICs
- Proficiency in Cadence/Synopsys custom design family tools such as Virtuoso, PrimeSim, Spectre, and AMS Designer, along with familiarity with industry-standard design practices
- Experience in advanced CMOS and/or BiCMOS technologies
- Expertise in advanced CMOS and/or BiCMOS design, FinFET CMOS layout optimization, and process technologies
- Skills in SPICE simulators, Verilog-A, and programming languages (TCL, Perl, C, Python, MATLAB)
- Experience in block-level and top-level design, including architecture definition, circuit implementation, layout supervision, and post-layout simulation and analysis
- Knowledge of signal processing, data conversion, and power management circuits, including familiarity with standard mixed-signal building blocks such as op-amps, comparators, ADCs, DACs, PLLs, and regulators
- Familiarity with silicon bring-up, validation, and debugging, and proficiency with lab equipment such as oscilloscopes, logic analyzers, and signal generators
- Strong problem-solving abilities, attention to detail, and the capacity to work both independently and in a team
- Excellent written and verbal communication skills
Key Responsibilities:
- Design and optimize analog and mixed-signal circuits to achieve optimal power, area, and performance
- Utilize Synopsys Custom Design Family tools, including Custom Compiler and PrimeSim, for design and verification purposes
- Manage physical layout to minimize parasitic effects and device stress
- Analyze and present simulation data for peer and customer reviews
- Mentor junior engineers and monitor their progress
- Document design features and test plans